Paper: A 3D Vertical-Channel Ferroelectric/Anti-Ferroelectric FET With Indium Oxide
Continuing with more ferro/antiferro studies, this paper goes into 3D structures for Fe/AFeFETs. 3D structure is getting more popular these days as there is more that can be done in comparison to a lateral structure in terms of the device structure and has the potential to fit more for something like memory devices. One popular analogy of 3D structures is skyscrapers. Just like how skyscrapers are constructed, 3D devices are the same way and additionally does not increase the device footprint as it just increases in height. A popular 3D device currently is the Complementary FET (CFET), said to be the next step in electronic devices after the Gate All Around Transistor (GAA FET) which was also included in imec’s transistor roadmap. Several groups also reported on CFETs during last year’s International Electronic Devices Meeting.
This paper caught my attention as it used Indium Oxide as a channel for the device, and the reasoning behind it was that in comparison to poly silicon it offer better reliability as it results in no interfacial layer (some low-k layer between the silicon and ferroelectric HfO2) and it has higher mobility. The group achieved a memory window of 1.3 V with ±7 V of PRG/ERS (program and erase or read and write) voltages, 10e3 cycles of endurance, and over 10e3 s of retention at room temperature with a ferroelectric film of 12nm. In comparison to other reports, this paper used a thinner ferroelectric film, has lower PRG/ERS voltages and relatively similar endurance and retention characteristics.
 Z. Li et al., “A 3D Vertical-Channel Ferroelectric/Anti-Ferroelectric FET With Indium Oxide,” in IEEE Electron Device Letters, vol. 43, no. 8, pp. 1227-1230, Aug. 2022, doi: 10.1109/LED.2022.3184316.
Alright, maybe you’re getting sick of it. So many reviews on ferroelectric devices. I do apologize that this is where my interest lies haha. This paper was quite interesting as it used a channel material I have never really heard of, although it kinda makes sense. IGZO (InGaZnO) has been quite a popular material recently used for the channel and other derivatives of Indium Oxide (Indiumn Oxide itself, Indium Tin Oxide, Indium Zinc Oxide, Indium Gallium Oxide, etc.) has as well, so I guess this was not that much of a shock.
Again a variety of things can be tested out with these devices. The paper provides a table comparing the device with previous reports, and one that sticks out is a device using a IZO channel with mostly superior performance (as far as I see it), asides from the fact that it has a thicker ferroelectric film and no retention recorded. Also, as the paper mentioned that the usage of Indium Oxide was due to no interfacial layer and high mobility, I do wonder if 2D materials or even something like carbon nanotubes could be used as a channel material for FeFETs.